Test MP+dmb.sy+data-rfi-pos-[fr-rf]-ctrlisb

AArch64 MP+dmb.sy+data-rfi-pos-[fr-rf]-ctrlisb
"DMB.SYdWW Rfe DpDatadW Rfi PosRR FrLeave RfBack DpCtrlIsbdR Fre"
Cycle=Rfi PosRR FrLeave RfBack DpCtrlIsbdR Fre DMB.SYdWW Rfe DpDatadW
Relax=
Safe=Rfi Rfe Fre PosRR DMB.SYdWW DpDatadW DpCtrlIsbdR [FrLeave,RfBack]
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr Rf
Orig=DMB.SYdWW Rfe DpDatadW Rfi PosRR FrLeave RfBack DpCtrlIsbdR Fre
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X3=z; 1:X8=x;
2:X1=z;
}
 P0          | P1           | P2          ;
 MOV W0,#1   | LDR W0,[X1]  | MOV W0,#2   ;
 STR W0,[X1] | EOR W2,W0,W0 | STR W0,[X1] ;
 DMB SY      | ADD W2,W2,#1 |             ;
 MOV W2,#1   | STR W2,[X3]  |             ;
 STR W2,[X3] | LDR W4,[X3]  |             ;
             | LDR W5,[X3]  |             ;
             | LDR W6,[X3]  |             ;
             | CBNZ W6,LC00 |             ;
             | LC00:        |             ;
             | ISB          |             ;
             | LDR W7,[X8]  |             ;
Observed
    z=2; y=1; x=1; 1:X7=1; 1:X6=1; 1:X5=2; 1:X4=2; 1:X0=0;